Joseph J. Nahas

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Joseph J. Nahas

Joseph J. Nahas received the Ph.D. degree in electrical engineering from Purdue University, West Lafayette, IN, in 1971. He joined the faculty of the Department of Electrical Engineering at the University of Notre Dame in 1971 and Bell Laboratories in 1976. At Bell Laboratories was progressively a Member of the Technical Staff, supervisor of the Analog/Digital IC Design Group where he supervised the development of the first fully functional single chip telephone, and Head of the Microprocessor Design Department in which the 32200, CRISP, and Hobbit microprocessors were developed.

In 1990 he joined the Motorola Semiconductor Product Sector (now Freescale Semiconductor) as Manager of Advanced Product Development for the High End Microprocessor Division. At Motorola he has been Manager of the 88000 Microprocessor Operation, Chief of the Semiconductor Technology Staff, and Director of Technology Planning. In 2001, he returned to active design work as a Senior Member of the Technical Staff and Project Leader in the Technology Solutions organization in Austin, TX, where he worked on MRAM memory architectures and circuits, and on simulation models for magnetic tunnel junctions.

Dr. Nahas is currently an Visiting Professor in the Departments of Computer Science and Engineering at the University of Notre Dame. His research interests at Notre Dame include nanomagnetic logic, applications of TFET technology, and advanced computer systems.

Dr. Nahas holds 39 patents in telecommunications analog circuits and architectures, voltage references and regulators, and memory circuits and architectures. Dr. Nahas is a senior member of the IEEE and a member of the ACM.

J. Nahas Homepage
Last modified: Tue Dec 11 14:34:22 EST 2012