Computer Architecture I
CSE 30321
Fitzpatrick 356a
Tuesday/Thursday, 11:00 a.m. - 12:15 p.m.
Course
Objectives
Objectives
By the end of this course you should be able to:
- Describe the fundamental components required in a single core of a modern microprocessor as well as how they interact with each other, with main memory, and with external storage media.
- Suggest, compare, and contrast potential architectural enhancements by applying appropriate performance metrics.
- Apply fundamental knowledge about a processor’s datapath, different memory hierarchies, performance metrics, etc. to design a microprocessor such that it (a) meets a target set of performance goals and (b) is realistically implementable.
- Explain how code written in (different) high-level languages (like C, Java, C++, Fortran, etc.) can be executed on different microprocessors (i.e. Intel, AMD, etc.) to produce the result intended by the programmer.
- Use knowledge about a microprocessor’s underlying hardware (or “architecture”) to write more efficient software.
- Explain and articulate why modern microprocessors now have more than one core and how software must adapt to accommodate the now prevalent multi-core approach to computing.
Grading
Course
Schedule
Schedule
| Date | Day | Topic | Suggested Reading | HWs | Labs | |||
|---|---|---|---|---|---|---|---|---|
| 1 | Aug. 23 | Tu | Introduction and Course Overview | |||||
| 2 | Aug. 25 | Th |
Stored Programs (Part 1)
|
HP 1.1-1.3 | ||||
| 3 | Aug. 30 | Tu |
Stored programs (Part 2)
|
HP 1.1-1.3 |
HW 01 Datapath copy Solutions |
Lab 01 Screen tutotial .cshrc changes |
||
| 4 | Sep. 1 | Th |
Performance metrics
|
HP 1.4-1.10 | ||||
| 5 | Sep. 6 | Tu |
MIPS ISA
|
HP 2.1-2.3, 2.5-2.7 |
HW 02 Solutions (HW 01 due) |
|||
| 6 | Sep. 8 | Th |
MIPS examples
|
HP 2.1-2.3, 2.5-2.7 | ||||
| 7 | Sep. 13 | Tu |
MIPS procedure calls
|
HP 2.8 (2.12, 2.13 recommended) |
HW 03 Solutions (HW 02 due) |
Lab 02 Problem 2 solutions Lab 02 Grades Working Mergesort |
||
| 8 | Sep. 15 | Th |
MIPS procedure calls
|
|||||
| 9 | Sep. 20 | Tu |
MIPS procedure call examples
|
HW 04 Solutions (HW 03 due) |
||||
| 10 | Sep. 22 | Th |
MIPS datapath
|
HP 4.1-4.4 | ||||
| 11 | Sep. 27 | Tu |
MIPS datapath - Examples
|
HW 05 Datapath FSM Solutions (HW 04 due) |
||||
| 12 | Sep. 29 | Th |
Pipelining (concept)
|
HP 4.5-4.7 | ||||
| 13 | Oct. 4 | Tu |
Pipelining (hazards)
|
(HW 05 due) |
Lab 03 Lab 03 solutions |
|||
| 14 | Oct. 6 | Th |
Pipelining (hazards)
|
(Lab 02 due) | ||||
| 15 | Oct. 11 | Tu | Midterm Review | |||||
| 16 | Oct. 13 | Th | In Class Midterm; (Solutions and Feedback). | |||||
| Oct. 18 | Tu | No Class: Fall Break | ||||||
| Oct. 20 | Th | No Class: Fall Break | ||||||
| 17 | Oct. 25 | Tu |
Memory hierarchies / Intro. to caches
|
HP 5.1-5.2 | ||||
| 18 | Oct. 27 | Th |
Cache examples (finding & placing data)
|
(Lab 03 due) | ||||
| 19 | Nov. 1 | Tu |
Improving cache performance
|
HP 5.3 |
HW 06 Solutions |
Lab 04 Lab 04 solutions |
||
| 20 | Nov. 3 | Th |
Introduction to Virtual Memory
|
HP 5.4-5.5 | ||||
| 21 | Nov. 8 | Tu |
Virtual Memory, complete address translation
|
HP 5.4-5.5 |
HW 07 HW 07 solutions (HW 06 due) |
|||
| 22 | Nov. 10 | Th |
Storage class memory
|
HP 6.3 |
Final Project |
|||
| 23 | Nov. 15 | Tu |
Parallel processing
|
HP 7 |
Lab 05 Lab 05 solutions |
|||
| 24 | Nov. 17 | Th |
Cache Coherency
|
HP 5.8 | (Lab 04 due) | |||
| 25 | Nov. 22 | Tu |
Cache Coherency
|
HW 08 HW 08 solutions (HW 07 due) |
||||
| Nov. 24 | Th | No Class: Thanksgiving | ||||||
| 26 | Nov. 30 | Tu |
Interconnection Networks
|
|||||
| 27 | Dec. 1 | Th |
Parallel Programming
|
(Lab 05 due) | ||||
| 28 | Dec. 6 | Tu |
Multicore, Multithreads (+ Review)
|
(HW 08 due) | ||||
| 29 | Dec. 8 | Th |
Final exam review
|
|||||
| Dec. 13 | Tu | In Class Final Exam - 10:30-12:30 | ||||||
| Dec. 15 | Th | Final project report due at 3:00 p.m. | ||||||
Lab
Resources
Resources
- Labs will be held in 108 Stinson-Remick.
Required
Texts
Texts
- David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, 4th Ed., Morgan Kaufmann Publishers, ISBN 978-0-12-374493-7.
Contact
Information
Information
Instructor
-
Michael T. Niemier(mniemier@nd.edu)
380 Fitzpatrick Hall
Notre Dame, IN 46556
(574) 631-3858
Office Hours: Monday, 3:00-4:30 pm and Thursday, 2:30-4:00 pm
Graduate TAs
-
Nikhil Yadav (afs id = nyadav)
Office Hours: available during scheduled lab periods
Undergraduate TAs
-
Chad Heise (afs id = cheise)
Office Hours: Monday: 9:30-10:30, 213 Cushing
Charles Torbert (afs id = ctorbert)
Office Hours: Friday: 3:30-4:30, 213 Cushing
Jacob Wenger (afs id = jwenger)
Office Hours: Monday: 10:30-11:30, 213 Cushing